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TDA8140
HORIZONTAL DEFLECTION POWER DRIVER
. . . . . . . . .
CONTROLLED DRIVING OF THE POWER TRANSISTOR DURING TURN ON AND OFF PHASE FOR MINIMUM POWER DISSIPATION AND HIGH RELIABILITY HIGH SOURCE AND SINK CURRENT CAPABILITY DISCHARGE CURRENT DERIVED FROM PEAK CHARGE CURRENT CONTROLLED DISCHARGE TIMING DISABLE FUNCTION FOR SUPPLY UNDER VOLTAGE AND NONSYNCHRONOUS OPERATION PROTECTION FUNCTION WITH HYSTERESIS FOR OVERTEMPERATURE OUTPUT DIODE CLAMPING LIMITING OF THE COLLECTOR PEAK CURRENT OF THE DEFLECTION POWER TRANSISTOR DURING TURN ON PERIOD SPECIAL REMOTE FUNCTION WITH DELAY TIME TO SWITCH THE OUTPUT ON
The current source characteristic of this device is adapted to the on-linear current gain behaviour of the power transistor providing a minimum power dissipation. The TDA8140 is internally protected against short circuit and thermal overload.
POWERDIP (8 + 8) (Plastic Package) ORDER CODE : TDA8140
DESCRIPTION The TDA 8140 is a monolithic integrated circuit designed to drive the horizontal deflection power transistor. PIN CONNECTIONS
OUTPUT VCC SENSE IN SENSE GND C EXT SPECIAL REMOTE STANDBY CONTROL INPUT PROTECTION AND REMOTE STANDBY INPUT 1 2 3 4 5 6 7 8 16 15 14 13 COMMON GND 12 11 10 9
8140-01.EPS
September 1993
1/10
TDA8140
PIN FUNCTION
Pin 1 2 3 4 5 6 Name Output VCC Sense Input Sense GND CEXT Special Remote/Standby Function Device Output Supply Voltage Input voltage that determines output current. Reference Ground for Input Voltage at Sense Input Capacitor between this terminal and Sense Ground determines the current slope dIo/dt during off phase. Low level at this input sets the device after a delay time tdr in the standby mode independent from control input (2nd priority) (in standard applications pin 6 must be left unconnected). High level at this input switches the BU508 off, low level switches the BU508 on. A high level at this input switches the BU508 off independent from all other inputs (1st priority). Common Ground
7 8 9-16
Control Input Protection and Remote Standby Input Power Ground
BLOCK DIAGRAM
VC C +
100k PROTECTION AND REMOTE STANBY INPUT
VH
TDA8140
8
2
SYNC. DET. THERMAL PROTECTION
I B1 VS
1 OUT
27 10H
BU508 220F SENSE IN
SPECIAL REMOTE 6 STANDBY & 7 CONTROL IN 5 C 1nF 9 10 11 12 13 14 15 16 4 GND 3
I B2 VC
4.7
RS
0.15
22nF
ABSOLUTE MAXIMUM RATINGS
Symbol VCC Id Ptot Tstg, Tj Toper Parameter DC Supply Voltage Output Current Power Dissipation Storage and Junction Temperature Operating Temperature Value 18 Internally Limited Internally Limited - 40, + 150 0, + 70 Unit V
8140-02.TBL 8140-03.TBL
C C
THERMAL DATA
Symbol Rth j-amb Rth j-case Parameter Thermal Resistance Junction-ambient Thermal Resistance Junction-case Max Max Value 70 15 Unit C/W C/W
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8140-02.EPS
8140-01.TBL
TDA8140
ELECTRICAL CHARACTERISTICS (VCC = 12V, Tamb = 25oC unless otherwise specified)
Symbol VCC IQ Ip0 In0 Io0 GON GOFF GREMOTE I5 RINS IINS RSYN VTHS VSYN VTHA IINA VTHB IINB tdr tdon VCC-VOUT VCC ON VCC OFF VS limit
Notes : 1. 2. 3. 4.
Parameter Supply Voltage Quiescent Current Positive Output Current (source) Negative Output Current (sink) Positive quiescent output current forcing the output to 6 V and the sense input to ground, output externally forced to 6V Transconductance ON Phase (1) Transconductance OFF Phase (2) Transconductance Standby Mode Current Source Pin 5 Sense Input Resistance Sense Input Bias Current Synchronous Detection Input Resistance Threshold Voltage of the Synchronous Detection Input Sync Detect Input Voltage Threshold Voltage of Control Input Pull up Current of Control Input Threshold Voltage Remote Input Pull up Current of the Remote Input Remote Delay Time (3) On Delay Time Output Voltage Drop for Ip0 = 1 A Supply Voltage for Device "ON" Supply Voltage for Device "OFF" (output internally switched to ground) Sense Limit Voltage (4)
Test Conditions All Inputs Open
Remote Input 1 Remote Input 0 See Figure 1 See Figure 1 Remote Input 0 V6 = 500mV VS > 0 VS < 0 VS = 0, Remote Input 1 VSYN < 7V VSYN > 7V
Min. 7 10 1.5 2 120 50 1.8 1.8 0.675 135 0.7 0.35 - 200 30 7 1
Typ. 15
Max. 18 25
150 80 2.0 2.0 0.75 165 1 0.5 - 300 60 10 1.8
200 100 2.2 2.2 0.825 200 1.3 0.7 - 400 150 15 2.8 30 2.5 - 160 +1 2.5 - 160 +1 300 4.5 3 7.0 6.8 1
Unit V mA A A mA mA A/V A/V A/V A k k A k k V V V A A V A A s s V V V V
0 < VIN < VTHA VIN > VTHA + 0.5V 0 < VIN < VTHB VIN > VTHB + 0.5V
1.5 - 50 -1 1.5 - 50 -1 190 2 5.8 5.6 0.8
I0 0
GON is measured with V3 varying from 150mV to 350mV (Pin 5 is grounded) GOFF is measured with V5 varying from 150mV to 350mV (Pin 3 is grounded) When the remote input goes from HIGH to LOW the BU508 is switched off and it remains in this condition for the time tdr. The sense input voltage VS is internally limited and results in a limited positive output current Ip0 = g VS limit. Note that due to the storage time tS of the BU508 limiting of VS leads to a reduced base current of the BU508 and the output current I0 is going to the positive quiescent current IO0.
TRUTH TABLE
Logic Inputs Control Input 0 Floating or 1 X X
Note :
Remote/Standby Floating or 1 Floating or 1 0 0 Io > 0 Io < 0 (5) Io < 0 (5) 0 < t < tdr Io > 0 t > tdr
Output Io BU508 ON BU508 OFF BU508 OFF BU508 ON
Mode Normal Function
5. IO < 0 means that the sink current flows into the output to ground.
3/10
8140-05.TBL
Remote/Standby Function
8140-04.TBL
2 - 100 0 2 - 100 0 250 3 2.8 6.4 VCC ON - 0.2 V 0.9
TDA8140
GON |GOFF| and VPin5 VPin3
Figure 1 :
G ON (A/V) or G OFF (A/V) 2.2
2.1
2.0
1.9
1.8
8140-03.EPS 8140-04.EPS
V Pin3 (mV) or V Pin5 (mV) 1.7 0 50 100 150 200 250 300 350 400 450 500 550 600 650 700 750
Figure 2 : Large Screen Application
+12V Ca STANDBY D1 2 8 RO 7 1 LO CO 3 BU508 OUT Rf
TDA8140
Rb R Cb 4
S
9
10
11
12
13
14
15
16
5 CS
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TDA8140
Figure 3 : P.C. Board and Components Layout of the Figure 2 (1 : 1 scale)
STANDBY
Rf Cs Rs
D1
TDA8140
OUT
Co
Lo
BU
Rb Cb
Ro
+12V
COMPONENTS LIST FOR TYPICAL APPLICATION
CRT Ca Ro Co Lo 22"/26" 100 47 F 27 2W 220 F 10 H 14"/20" 90 47 F 27 1 W 220 F 10 H CRT Rb Cb Rs Cs 22"/26" 100 4.7 47 nF 0.15 1 nF
14"/20" 90
4.7 0.1 1 nF
8140-06.TBL
47 nF
APPLICATION INFORMATION The conventional deflection system is shown in Figure 4. The driving circuit consists of a bipolar power transistor driven by a transformer and a medium power element plus some passive components. Figure 4 : Conventional Horizontal Deflection System for TVs
VCC + DRIVING CIRCUIT IC IB ID
HORIZONTAL TRANSFORMER YOKE
DEFLECTION CIRCUIT
V IN
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8140-06.EPS
8140-05.EPS
Ca
TDA8140
During the active deflection phase the collector current of the power transistor is linearly rising and the driving circuitry must be adapted to the required base current in order to ensure the power transistor saturation. According to the limited components number the typical approach of the present TVs provides only a rough approximation of this objective ; in Figure 5 we give a comparison between the typical real base current and the ideal base current waveform and the collector waveform. The marked area represents a useless base current which gives an additional power dissipation on the power transistor. Furthermore during the turn-ON and turn-OFF transient phase of the chassis the power transistor is extremely stressed when the conventional network cannot guarantee the saturation ; for this reason, generally, the driving circuit must be carefully designed and is different for each deflection system. The new approach, using the TDA 8140, overcomes these restrictions by means of a feedback principle. As shown in Figure 5, at each instant of time the ideal base current of the power transistor results from its collector current divided by such current gain which ensure the saturation ; thus the required base current Ib can be easily generated by a feedback transconductance amplifier gm which senses the deflection current across the resistor Rs at the emitter of the power transistor and delivers : Ib = RS . gm . Ie The transconductance must only fulfill the condition : 1 1 1 < gm < RS 1 + min RS Where min is the minimum current gain of the transistor. This method always ensures the correct Figure 6
I0 dI 0 dt t don I0 IS0 ON PHASE In0 OFF PHASE t Ip0 = IS0 tS
tS ID I BIAS Base Bias Current IC
base current and acts time independent on principle. For the turn-OFF, the base of the power transistor must be discharged by a quasi linear time decreasing current as given in Figure 6. Conventional driver systems inherently result into a stable condition with a constant peak current magnitude. This is due to the constant base charge in the turn-ON phase independent from the collector current ; hence a high peak current results into a low storage time of the transistor because the excess base charge is a minimum and vice versa. In the active deflection the required function, high peak current-fast switch-OFF and low peak current-slow switch-OFF, is obtained by a controlled base discharge current for the power transistor ; the negative slope of this ramp is proportional to the actual sensed current. As a result, the active driving system even improves the sharpness of vertical lines on the screen compared with the traditional solution due to the increased stability factor of the loop represented as the variation of the storage time versus the collector peak current. Figure 5 : Waveforms of Collector and Base Current
IC Off Phase On Phase Off Phase Real Base Current Ideal Base Current t
t
CONTROL INPUT t
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8140-08.EPS
tS
8140-07.EPS
TDA8140
CIRCUIT DESCRIPTION Figure 7 shows the block diagram of the TDA8140, the circuit consists of an input transconductance amplifier composed by Q1, Q2, Q3 and Q4. The symmetrical output current is fed into the load resistor R1 and R2 ; the two amplifiers V1 and V2 realize a floating voltage to current converter which can drive 1.2A sink current and 2A source current for a wide common output range. So, the overall transconductance results into : R1 + R2 1 gm = R3 R5 A current source I1 generates a drop of 70mV across the resistor R4 which provides an output bias current of 140mA ; the control input determines the turn ON/OFF function. In the ON phase, Q5 shorts the external capacitor Ct. Within the input voltage range 0 < Vin < 750mV the element realizes the transconductance function ; lower voltages are clamped by the D1/Q6 configuration. For input voltages higher than 750mV, Q7 limits the maximum output current at 1.5A peak. In the turn-OFF mode, Ct will be charged by the controlled source I2 which is proportional to the input voltage, by this way, the output current decreases quasi linearly and the system stability is reached. During the flyback phase, the IC is disabled via the sync. detector input ; this function with the limited sink and source current together with the undervoltage turn-OFF and a chip temperature sensor ensure a complete protection of the IC. In Figure 8 is shown the application diagram of the TDA 8140, the few external component and the automatic handling possibility ensures a lower application cost versus the conventional approach shown in Figure 4. In Figure 9 is shown the currents and voltages waveforms of the driver circuit of Figure 8, as to be seen, the driving charge Ib ton has been reduced at minimum.
Figure 7 : Block Diagram of the Integrated Horizontal Driver
2 PROTECTION AND REMOTE STANDBY INPUT 8
VOLTAGE CONTROL VC < 7V &
OVERTEMP. PROTECTION
j T < 150C
VC C+
Q9
V1 Q10 R5 V2 INPUT TRANSCONDUCTANCE AMPLIFIER Q11
R1
R2
1
IB
OUTPUT
I2
Q2 CONTROL INPUT 7 & Q5
Q3 R3
Q4 Q1
I1
Q6 D1 R4 R6
Q7 D2 3 SENSE INPUT
VREF = 750mV
SPECIAL REMOTE STANDBY
V IN
6
Q8
5
CT
POWER GROUND
SENSE GROUND
7/10
8140-09.EPS
C EXT
9 10 11 12
13 14 15 16
4
TDA8140
Figure 8 : Integrated Horizontal Driver
HORIZONTAL TRANSFORMER
R V CC + 100F 2 IC ID
YOKE
220F 8 IB 1 3 5 Vi 7 9 to 16 4 4.7 27 2W DEFLECTION CIRCUIT
TDA8140
1nF
47nF
0.15
8140-10.EPS 8140-12.TIF
DRIVING CIRCUIT
Figure 9 : Signal Diagrams of the Driver Circuits
8/10
8140-11.TIF
TDA8140
The power dissipation on this application condition is about 1.3W and Figures 10 and 11 show two ways of heatsinking. In the first case, a PCB copper area is used as a heatsink L= 65mm while in the second case, the device is soldered to an external heatsink ; in both examples, the thermal resistance junction ambient is 35C/W. Figure 10 : Example of Heatsink using P.C. Board Copper (L = 65mm)
Copper Area 35 Thickness
30mm
8140-13.EPS
The presence of thermal shut-down circuit does mean that the heatsink can have a smaller factor of safety compared with that of a conventional circuit. If for any reason, the junction temperature increases up to 150C, the thermal shut-down simply switches off the device. Figure 11 : Example of an External Heatsink
L
9/10
8140-14.EPS
TDA8140
PACKAGE MECHANICAL DATA 16 PINS - PLASTIC POWERDIP
a1
I
b1 E
Z
b
B e3
e
D
16
9
F
L
1
8
Dimensions a1 B b b1 D E e e3 F i L Z
Min. 0.51 0.85 0.38
Millimeters Typ.
Max. 1.4
Min. 0.020 0.033 0.015
Inches Typ.
Max. 0.055
0.5 0.5 20 8.8 2.54 17.78 7.1 5.1 3.3 1.27
0.020 0.020 0.787 0.346 0.100 0.700
DIP16PW.TBL
0.280 0.201 0.130 0.050
Information furnished is believed to be accurate and reliable. However, SGS-THOMSON Microelectronics assumes no responsibility for the consequences of use of such information nor for any infringement of patents or other rights of third parties which may result from its use. No licence is granted by implication or otherwise under any patent or patent rights of SGS-THOMSON Microelectronics. Specifications mentioned in this publication are subject to change without notice. This publication supersedes and replaces all information previously supplied. SGS-THOMSON Microelectronics products are not authorized for use as critical components in life support devices or systems without express written approval of SGS-THOMSON Microelectronics. (c) 1994 SGS-THOMSON Microelectronics - All Rights Reserved Purchase of I2C Components of SGS-THOMSON Microelectronics, conveys a license under the Philips I2C Patent. Rights to use these components in a I2C system, is granted provided that the system conforms to the I2C Standard Specifications as defined by Philips. SGS-THOMSON Microelectronics GROUP OF COMPANIES Australia - Brazil - China - France - Germany - Hong Kong - Italy - Japan - Korea - Malaysia - Malta - Morocco The Netherlands - Singapore - Spain - Sweden - Switzerland - Taiwan - Thailand - United Kingdom - U.S.A.
10/10
PMDIP16W.EPS

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